Huawei, the Chinese technology leader, has unveiled its strategic vision for advanced computing, introducing a new generation of Ascend chips and an innovative cluster architecture aimed at dominating the AI landscape. This move, announced at the Huawei Connect 2025 event in Shanghai, marks a significant step in the company's response to global semiconductor challenges and its commitment to fostering an open-source ecosystem.
During his address, Eric Xu, Huawei's Deputy Chairman, reflected on a pivotal year, highlighting the debut of DeepSeek-R1 as a key milestone. He openly acknowledged the persistent gap in semiconductor manufacturing process nodes that China is likely to face for an extended period. To counteract these external pressures, including tariffs and trade restrictions, Huawei is channeling its efforts into revolutionary infrastructure design and technology. A core part of this strategy involves open-sourcing substantial portions of its software offerings, such as the openPangu foundation AI models and the Mind series SDKs, thereby inviting broader community participation and accelerating innovation.
Huawei's chip roadmap features three distinct series: the Ascend 950, 960, and 970. The Ascend 950PR and 950TO, sharing a common die, are engineered to support low-precision data formats, including FP8, where the 950 is expected to achieve a PFLOP of performance, and MXFP8, projected to deliver two PFLOPs. A PFLOP represents a staggering one thousand trillion floating-point calculations per second. These chips will also boast improved vector processing capabilities and more granular memory access, reducing from 512-byte chunks to 128-byte segments. Furthermore, the Ascend 950 chips will offer an impressive 2 TB/s interconnect bandwidth, a 2.5-fold increase over the current Ascend 910C. The 950PR is slated for release in the first quarter of 2026, followed by the Ascend 950DT in the fourth quarter of the same year.
Looking ahead, the Ascend 960, scheduled for release in the fourth quarter of 2027, promises a substantial leap forward with double the computing power, memory access bandwidth, memory capacity, and interconnect ports compared to its predecessor. This chip will support Huawei’s proprietary HiF4 data format, which the company asserts offers superior precision compared to other FP4 technologies. The pinnacle of this new line, the Ascend 970, is set for a fourth-quarter 2028 launch. While specific details are still under wraps, Xu indicated a general objective to significantly elevate all its specifications. The Ascend 970 series is anticipated to feature an interconnect bandwidth of 4TB/s, achieve 8 PFLOPs in FP4, and come equipped with a larger memory capacity, solidifying its position as a powerhouse in the AI compute space.
Central to Huawei's strategy is the creation of SuperPods, which are clusters of raw computing power designed for hyperscalers. The first of these, the Atlas 950 SuperPoD, equipped with the new Ascend 950DT chips, is expected to become available in the fourth quarter of 2026. Huawei claims its initial SuperPoD will house 56.8 times more NPUs than the GPUs in NVIDIA’s NVL144 system (a comparable SuperPod), delivering nearly seven times the processing power. Even with the planned introduction of NVIDIA’s NVL576 in 2027, the Atlas 950 SuperPoD is projected to maintain its performance superiority. For general computing needs, Huawei is also introducing two models of its Kunpeng 950 processors in Q1 2026, offering 96 cores and 192 threads, and a more powerful variant with 192 cores and 384 threads. Additionally, the TaiShan 950 SuperPod, built on the Kunpeng 950, will be launched in the first quarter of 2026, heralded by Xu as the world's first general-purpose computing SuperPoD.
To facilitate seamless communication within and between these powerful systems, Huawei is introducing UnifiedBus 2.0, an open-source connectivity protocol. This next-generation interconnexion technology builds upon the existing UnifiedBus 1.0, which has already seen over 300 installations with the Atlas 900 A3 SuperPoD since its service commencement in March. UnifiedBus 2.0's technical specifications will be immediately released to the developer community, promoting widespread adoption and collaborative innovation. It will not only be integrated within the new generations of SuperPods but will also enable the connection of SuperPods to form vast SuperClusters. The first such product, the Atlas 950 SuperCluster, is designed to offer 2.5 times more NPUs and 1.3 times more computing power than xAI’s Colossus, currently the world's most powerful computing cluster. By the fourth quarter of 2027, Huawei plans to launch the Atlas 960 SuperCluster, which will incorporate over a million NPUs and achieve an astounding 4 ZFLOPS in FP4 (where one ZFLOP represents 10^21 floating-point operations per second). Xu emphasized that these SuperPods and SuperClusters, powered by UnifiedBus, represent Huawei's definitive answer to the ever-increasing demand for computing power, both in the present and the future.
Huawei's strategic advancements in chip technology and cluster architecture, coupled with its commitment to open-source development, underscore a determined effort to solidify its position as a global leader in AI infrastructure. The company's innovative approach to tackling the complexities of high-performance computing, from individual chip design to large-scale data center solutions, is poised to reshape the landscape of artificial intelligence and high-performance computing for years to come.
